ReCo6502 Guide



Overview

ReCo6502 is a remake, using modern parts, of the Acorn 6502 Second Processor (which was introduced in 1984).

It offers several major enhancements. Most notably, support for faster 65C02s (up to 14 MHz instead of 3), support for the 65C816 (an enhanced version of the 65C02), and more memory (512 KB instead of 64).

Other enhancements include : more room for boot code (32 KB instead of 4), runtime selectable clock speed, on-board Hi-BASIC, and roughly halved power consumption.

ReCo6502 is not a standalone product. An existing Acorn 6502 Second Processor is required. ReCo6502 replaces its PCB, and 'inherits' its Tube ULA.

Using ReCo6502

Using ReCo6502 is, basically, no different than using the original Acorn 6502 Second Processor. Refer to the manual of your Second Processor for most of the operating instructions.

The use aspects of the enhancements offered by ReCo6502 will be discussed in the following parts of this manual.

Soft config

The 'soft config' allows more precise configuration of ReCo6502 than the configuration links do. E.g., the configuration links only allow selection of two processor clock frequencies. The 'soft config', which is remembered in RAM, allows you to select all 16 processor clock frequencies, enable or disable auto-load of the on-board Hi-BASIC, and enable or disable 65C816 24-bit linear addressing.

To manipulate the 'soft config', enter '*Setup', and follow the prompts (e.g. press C, then J, to configure the processor clock frequency to 4.02 MHz). Then press CTRL-BREAK to activate the new configuration.

If you encounter an unrecoverable situation, where the soft config 'hangs' the machine, press CTRL-BREAK twice, or, if that fails : switch off your second processor, disable the soft config with configuration link 3 (refer to the installation instructions for details), switch on, wait a second or two, switch off, re-enable the soft config, and switch on again.

Additional commands

There are two new *-commands :

Additional software

Several 'improved' versions of BASIC are available :

1) The version of HiBASIC contained in the standard ReCo6502 ROM (version '84') does not make any use of ReCo6502's extra on-board memory. The 'special' ReCo6502 ROMs ('ReCo6502ROM_02' and 'ReCo6502ROM_816') contain patched versions of HiBASIC 4r32 (as supplied in MOS 3.50 for the Master) that do.

The patched versions of HiBASIC 4r32 relocate the entire variable storage area (which is normally located between the program and the BASIC stack) to the extra on-board memory. This means that more memory becomes available for programs, and a lot more for variables.

The '816' version is 65C816 only. It provides a variable storage area of 448 KB, without a significant performance penalty. The '02' version can run on a 65C02 as well. But it provides a variable storage area of 'only' 224 KB, and is significantly slower than the '816' version, because it can only access the extra on-board memory indirectly. Also, the '02' version runs at 0xB000 instead of 0xB800 (i.e. program space is reduced by 2 KB).

There are a few additional differences compared to 'standard' HiBASIC :

You will find the 'special' ReCo6502 ROMs (and the HiBASICs contained within) in this directory. Simply program the appropriate ROM image into a PROM and use that to replace the standard ReCo6502 ROM. Or run 'HiBASIC_02' or 'HiBASIC_816' directly (making sure that both its load and execution address is set to &B000 or &B800 respectively).

2) Acorn's BAS128 for the BBC Master makes 64 KB of memory available to BASIC, by exploiting the Master's sideways RAM banks. It has been patched to run on ReCo6502, and exploit its own extra memory instead.

You will find the patched BAS128 as 'BAS128P' in this directory. Before running it on ReCo6502, make sure that its load and execution address is set to &3000 and &3100 respectively. Refer to 'AN033.pdf' for details about BAS128.

Extra RAM

ReCo6502 has 512 KB of on-board RAM. It can be used in several different ways, depending on the processor used.

A 65C02 can use 64 KB, and 224 KB more by bankswitching. Bankswitching must be explicitly enabled and used by software (refer to 'Programming interface' for details).

A 65C816 can use 512 KB, by virtue of its support for 24-bit linear addressing (but note that ReCo6502 ignores the most significant five address bits). By default, the processor runs in 'emulation mode', and linear addressing (a.k.a. 65C816 banking) is enabled. Files can be loaded and saved directly into and from the entire (512 KB) memory, but you will need to write your own assembly code and use 'long' instructions (and/or data/program banking) to access memory beyond the first 64 KB.

Programming interface

Advanced use of ReCo6502, exploiting the extra memory in particular, requires a bit of software that manipulates hardware registers. The standard ReCo6502 ROM provides some basic utility code to help. Refer to 'Hardware registers' for a detailed description of the hardware registers.

There is a single entry point for the utility code, at address &F803 :

Note that the configuration link settings are not significant to the hardware. The standard ReCo6502 boot code interprets the link settings in its own way. If you intend to write your own boot code, you are free to interpret the link settings differently.

Hardware registers

There are four hardware registers, named 'default', 'divider', 'banking' and 'banknum'. They are all shift registers, i.e. they are written to one bit at a time (although you will not notice that if you use the utility code to write to them, because you then simply pass a value, refer to 'Programming interface' for details).

All registers are write only, and appear at address &FEF0. A 3-bit value is written. The register is selected by bits 2-1 (0, 1, 2, 3 respectively for 'default', 'divider', 'banking' and 'banknum'), and the value of bit 0 is written into the most significant bit of the selected register, while shifting 'down' the old value (similar to a 6502 'ROR' instruction where C is set to the value of bit 0).

'Default' (a 1-bit register), when set to 1, will suppress the effects of all other registers' values, so they can be updated safely. Specifically, it will force the processor clock to 'slow' (which is fixed at 3.15 MHz, making the value of 'divider' irrelevant), and implicitly force 'banking' to '1000' (disabling all banking, and enabling the ROM). When 'default' is set to 0, the values of all other registers become effective again.

'Divider' (a 4-bit register), selects the 'fast' processor clock frequency :

Value Frequency
0 22.1184 MHz
1 14.7456 MHz
2 11.0592 MHz
3 8.84736 MHz
4 7.37280 MHz
5 6.31954 MHz
6 5.52960 MHz
7 4.91520 MHz
8 4.42368 MHz
9 4.02153 MHz
10 3.68640 MHz
11 3.40283 MHz
12 3.15977 MHz
13 2.94912 MHz
14 2.76480 MHz
15 2.60216 MHz

Note that, regardless of the 'fast' processor clock frequency, the Tube ULA is always accessed in 'slow' mode (3.15 MHz).

'Banking' (a 4-bit register), decodes as follows :

bit 3 : ROM enable
bit 2 : 65C816 banking enable
bit 1 : banking enable for address window 2 (0x8000 through 0xBFFF)
bit 0 : banking enable for address window 1 (0x4000 through 0x7FFF)

To enable the ROM, set bit 3 to 1 (but note that you may have to switch to a lower processor clock frequency first, because the ROM allows only relatively slow accesses). The ROM will appear at addresses 0x8000 through 0xFFFF.

To enable 65C816 linear addressing (where bits 18 through 16 of the address are conveyed via the databus), set bit 2 to 1.

To enable bankswitching for address window 2 and/or 1, set bit 1 and/or 0 to 1 respectively. When bankswitching is enabled, you can use the 'banknum' register to choose which one of 8 different banks of 16 KB appears in the address window. When bankswitching is disabled, this is always 'bank 0'.

'Banknum' (a 6-bit register), decodes as follows :

bit 5-3 : number of the bank appearing in address window 2
bit 2-0 : number of the bank appearing in address window 1

Refer to the description of the 'banking' register for more details.