Use - Altera Stratix III FPGA Development Kit

Connecting

Note that the 'standard' way of connecting requires a Terasic P0033 HSMC-to-GPIO board (not the P0024, which looks very similar !).

Also note that, while the GPIO connectors on both the P0033 and Terasic development boards have the same pinout, their orientation differs by 180 degrees, so connection is a little awkward (refer to the images).

The 20-pin way

This looks like :

The 40-pin way

This looks like :

Programming

The 20-pin and 40-pin programming files are named 'ter_20' and 'ter_40' respectively, and can be found in this directory.

This is release 3 (25 Dec 2020).

Using

The available processor clock frequencies are 1 through 90 MHz.

And note that :

• The LCD display on the development board always reflects the current clock speed.
• Switch SW0 on the development board can be used to enable (switch '1') or disable (switch '0') the Second Processor.
• Segment display 'USER DISPLAY' on the development board updates around 6 times per second to reflect what is on the Z80 address bus.