Soft 32016 Second Processor Guide
Use - General |
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The Soft 32016 Second Processor provides the logic to turn your hardware development board into an Acorn 32016 Second Processor.
The currently supported development boards are :
| Board | Clock | Bench | RAM | I/O |
|---|---|---|---|---|
| (click link for info) | (MHz) | (MHz) | (MB) | (Volt) |
| Terasic DE0 Nano | 50 | 306 | 8 | 3.3 |
| Terasic Cyclone V GX Starter Kit | 80 | 490 | 0.5 | 3.3 |
| Altera Stratix III FPGA Development Kit | 120 | 735 | 8 | 2.5 |
| Altera Stratix V Advanced Systems Development Kit | 150 | 919 | 4 | 2.5 |
| Terasic DE10 Nano | 70 | 429 | 0.5 | 3.3 |
| Terasic Cyclone 10 LP Evaluation Kit | 60 | 367 | 8 | 3.3 |
'Clock (MHz)' indicates the highest clock speed that the soft Second Processor will run at. Except on the DE0 Nano, it will also run at any lower, integer clock speed, including the original one (6 MHz).
'Bench (MHz)' indicates the 'benchmark' speed at the highest clock speed. On an original Second Processor, this would equal the clock speed. On the soft one, it is roughly six times the clock speed (because the 32016 core that is used has an integrated cache and executes many instructions in far fewer cycles than a real 32016).
'RAM (MB)' indicates the total amount of available RAM.
'I/O (Volt)' indicates the I/O voltage of the development board. Since the Tube I/O voltage is 5, a converter like TubeSilencer is required to avoid damaging the development board.
Before you continue, please note that doing anything described here is at your own risk !
Your Acorn machine's Tube interface may be connected to your development board in two different ways, designated as '20-pin' and '40-pin', both involving a TubeSilencer.
Note that the 'in' and 'out' connectors on TubeSilencer are marked by '5V' and 'LV' respectively, at the pin 1 side. Your machine connects to the 'in', your development board to the 'out'.
The 20-pin way allows connection via a 20-pin TubeSilencer. The TubeSilencer is plugged directly into the exact middle of the relevant 40-pin development board socket. I.e. this works out as : from 40-pin Tube socket, via 40-wire straight cable, via 20-pin TubeSilencer, to 40-pin development board socket.
So, a 20-pin interface looks like this :
The 40-pin way allows connection via a 40-pin TubeSilencer. The TubeSilencer is connected to the relevant 40-pin development board socket via a specially cut-up 40-wire cable. I.e. this works out as : from 40-pin Tube socket, via 40-wire straight cable, via 40-pin TubeSilencer, via 40-wire specially cut-up cable, to 40-pin development board socket.
So, a 40-pin interface looks like this :
The specially cut-up cable is wired as follows (TS = TubeSilencer, DB = development board) :
| TS side pins | DB side pins |
|---|---|
| 1 through 10 | 1 through 10 |
| 11 through 26 | 12 through 27 |
| 27 through 32 | 30 through 35 |
| 33 through 40 | not connected |
The cable can be fabricated quite easily from two 40-pin IDC connectors and a short piece (10 cm or so) of 40-wire flatcable, as follows :
Proceed as follows :
Using the soft 32016 Second Processor is, in general, no different than using the real one, so please refer to the relevant manuals (if you don't have them, try Internet).
However, on the soft one (except on the DE0 Nano), you can change the processor clock frequency to any whole number of MHz (50 MHz in the examples below). The transition to the new frequency is seamless, and survives (CTRL-)BREAK. Note that the maximum frequency (see table above) is automatically selected if you attempt to exceed it, and that 0 selects the default frequency (6 MHz).
There are two ways to switch :
The 32016 core that is used on all boards is '(C) 2018 Udo Möller, info@cpu-ns32k.net'. He also created some initial support logic, and the DE0 Nano SDRAM controller.
All other logic design, including the Tube ULA, is my own. An interesting story about the early development stages of the soft 32016 Second Processor can be read here.